Verilator for Linux

Verilator for Linux compiles synthesizable Verilog, plus some PSL, SystemVerilog, and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to generate executable models of CPUs for embedded software design teams.
License Free
File Size 1.81 MB
Version 3.846
Operating System Linux